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`!Chisel`! (an `F33f`_`[acronym`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Acronym]`_`f for `!Constructing Hardware in a Scala Embedded Language`!`:cite-ref-1[`F5bf`_`[1`#cite-note-1]`_`f]) is an `F33f`_`[open-source`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Open-source]`_`f `F33f`_`[hardware description language`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Hardware_description_language]`_`f (HDL) used to describe `F33f`_`[digital electronics`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Digital_electronics]`_`f and circuits at the `F33f`_`[register-transfer level`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Register-transfer_level]`_`f.`:cite-ref-2[`F5bf`_`[2`#cite-note-2]`_`f]`:cite-ref-3[`F5bf`_`[3`#cite-note-3]`_`f]

Chisel is based on `F33f`_`[Scala`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Scala_(programming_language)]`_`f as a `F33f`_`[domain-specific language`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Domain-specific_language]`_`f (DSL). Chisel inherits the `F33f`_`[object-oriented`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Object-oriented_programming]`_`f and `F33f`_`[functional programming`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Functional_programming]`_`f aspects of Scala for describing digital hardware. Using Scala as a basis allows describing circuit generators. High quality, free access documentation exists in several languages.`:cite-ref-4[`F5bf`_`[4`#cite-note-4]`_`f]

Circuits described in Chisel can be converted to a description in `F33f`_`[Verilog`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Verilog]`_`f for `F33f`_`[synthesis`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Logic_synthesis]`_`f and `F33f`_`[simulation`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Logic_simulation]`_`f.

>>Contents

• `F0af`_`[Code examples`#code-examples]`_`f
• `F0af`_`[Use`#use]`_`f
• `F0af`_`[See also`#see-also]`_`f
• `F0af`_`[References`#references]`_`f
• `F0af`_`[External links`#external-links]`_`f

-─

>>Code examples

A simple example describing an `F33f`_`[adder`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Adder_(electronics)]`_`f circuit and showing the organization of components in Module with `F33f`_`[input and output`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Input/output]`_`f ports:

`B100`F9d9class Add extends Module {`f`b
`B100`F9d9 val io = IO(new Bundle {`f`b
`B100`F9d9 val a = Input(UInt(8.W))`f`b
`B100`F9d9 val b = Input(UInt(8.W))`f`b
`B100`F9d9 val y = Output(UInt(8.W))`f`b
`B100`F9d9 })`f`b
`B100`F9d9`f`b
`B100`F9d9 io.y := io.a + io.b`f`b
`B100`F9d9}`f`b

A 32-bit register with a reset value of 0:

`B100`F9d9val reg = RegInit(0.U(32.W))`f`b

A `F33f`_`[multiplexer`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Multiplexer]`_`f is part of the Chisel library:

`B100`F9d9val result = Mux(sel, a, b)`f`b

>>Use

Although Chisel is not yet a mainstream hardware description language, it has been explored by several companies and institutions. The most prominent use of Chisel is an implementation of the `F33f`_`[RISC-V`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=RISC-V]`_`f instruction set, the open-source Rocket chip.`:cite-ref-5[`F5bf`_`[5`#cite-note-5]`_`f] Chisel is mentioned by the Defense Advanced Research Projects Agency (`F33f`_`[DARPA`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=DARPA]`_`f) as a technology to improve the efficiency of electronic design, where smaller design teams do larger designs.`:cite-ref-6[`F5bf`_`[6`#cite-note-6]`_`f] `F33f`_`[Google`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Google]`_`f has used Chisel to develop a `F33f`_`[Tensor Processing Unit`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Tensor_Processing_Unit]`_`f for `F33f`_`[edge computing`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Edge_computing]`_`f.`:cite-ref-7[`F5bf`_`[7`#cite-note-7]`_`f] Some developers prefer Chisel as it requires one-fifth as much code and is much faster to develop than Verilog.`:cite-ref-8[`F5bf`_`[8`#cite-note-8]`_`f]

Circuits described in Chisel can be converted to a description in `F33f`_`[Verilog`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Verilog]`_`f for `F33f`_`[synthesis`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Logic_synthesis]`_`f and `F33f`_`[simulation`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Logic_simulation]`_`f using a program named FIRRTL.`:cite-ref-9[`F5bf`_`[9`#cite-note-9]`_`f]

>>See also

• `F33f`_`[VHDL`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=VHDL]`_`f
• `F33f`_`[Verilog`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Verilog]`_`f
• `F33f`_`[SystemC`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=SystemC]`_`f
• `F33f`_`[SystemVerilog`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=SystemVerilog]`_`f

>>References

`:cite-note-1`!1.`! `F0af`_`[↑`#cite-ref-1]`_`f `:citerefbachrachvorichardslee2012`aBachrach, J.; Vo, H.; Richards, B.; Lee, Y.; Waterman, A.; Avižienis, R.; Wawrzynek, J.; Asanović, K. (June 2012). "Chisel: constructing hardware in a Scala embedded language". `*Proceedings of the 49th Annual Design Automation Conference (DAC 2012)`*. San Francisco, California, US: `F33f`_`[Association for Computing Machinery`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Association_for_Computing_Machinery]`_`f (ACM). pp. 1216–25. `F33f`_`[doi`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Doi_(identifier)]`_`f:10.1145/2228360.2228584. `F33f`_`[ISBN`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=ISBN_(identifier)]`_`f 978-1-4503-1199-1.
`:cite-note-2`!2.`! `F0af`_`[↑`#cite-ref-2]`_`f "Chisel". `*people.eecs.berkeley.edu`*. California, U.S.: `F33f`_`[University of California, Berkeley`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=University_of_California,_Berkeley]`_`f. Archived from the original on 2021-10-16. Retrieved 2020-07-08.
`:cite-note-3`!3.`! `F0af`_`[↑`#cite-ref-3]`_`f `:citerefbachrach`aBachrach, Jonathan (ed.). "Chisel: Accelerating Hardware Design" (PDF). `*`F33f`_`[RISC-V`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=RISC-V]`_`f`*. California, U.S.: RISC-V International.
`:cite-note-4`!4.`! `F0af`_`[↑`#cite-ref-4]`_`f `:citerefschoeberl2019`aSchoeberl, Martin (August 30, 2019). `*Digital Design with Chisel`* (in English, Chinese, Japanese, and Vietnamese) (2nd ed.). Kindle Direct Publishing. `F33f`_`[ISBN`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=ISBN_(identifier)]`_`f 978-1689336031.
`:cite-note-5`!5.`! `F0af`_`[↑`#cite-ref-5]`_`f `:citerefasanovi`a`F33f`_`[Asanović, Krste`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Krste_Asanović]`_`f; et al. "rocket-chip". `*GitHub`*. RISC-V International. Retrieved 11 November 2016.
`:cite-note-6`!6.`! `F0af`_`[↑`#cite-ref-6]`_`f `:citerefmoore2018`aMoore, Samuel K. (2018-07-16). "DARPA Plans a Major Remake of U.S. Electronics". `*IEEE Spectrum`*. `F33f`_`[Institute of Electrical and Electronics Engineers`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=Institute_of_Electrical_and_Electronics_Engineers]`_`f (IEEE). Retrieved 2020-06-10.
`:cite-note-7`!7.`! `F0af`_`[↑`#cite-ref-7]`_`f Derek Lockhart, Stephen Twigg, Ravi Narayanaswami, Jeremy Coriell, Uday Dasari, Richard Ho, Doug Hogberg, George Huang, Anand Kane, Chintan Kaur, Tao Liu, Adriana Maggiore, Kevin Townsend, Emre Tuncer (2018-11-16). `*Experiences Building Edge TPU with Chisel`*. Retrieved 2020-06-10.
`:cite-note-8`!8.`! `F0af`_`[↑`#cite-ref-8]`_`f "XiangShan open-source 64-bit RISC-V processor to rival Arm Cortex-A76 - CNX Software". `*CNX Software - Embedded Systems News`*. 2021-07-05. Retrieved 2022-03-26.
`:cite-note-9`!9.`! `F0af`_`[↑`#cite-ref-9]`_`f "Chisel/FIRRTL Hardware Compiler Framework". Retrieved 2022-09-08.

>>External links

• Official website
• Chisel 3 on `F33f`_`[GitHub`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=GitHub]`_`f
• Chisel's channel on `F33f`_`[YouTube`:/page/wikibook/entry.mu`zim=wikipedia_en_all_nopic_2025-08.zim|entry_path=YouTube_channel_(identifier)]`_`f

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